1. Field of the Invention
The invention relates to a pixel circuit, more particularly to a pixel circuit that includes a light emitting diode.
2. Description of the Related Art
Organic light emitting diode (OLED) displays are being increasingly widely used due to the advantages of spontaneous emission of light, high luminance, fast response time, and wide viewing angle.
A conventional OLED display utilizes a plurality of pixel circuits that are arranged in matrices and that can emit light of different colors to achieve the function of displaying images. The pixel circuits are scanned in rows or columns in sequence for determining the intensity of light each pixel circuit is to emit. With reference to FIG. 1, each of the pixel circuits includes an organic light emitting diode (OLED) 1 and a first conventional driving circuit 2. The first conventional driving circuit 2 generates a driving current (IDRIVE). The organic light emitting diode 1 is driven by the driving current (IDRIVE) from the first conventional driving circuit 2 to emit light with a luminance that corresponds to a magnitude of the driving current (IDRIVE).
The first conventional driving circuit 2 includes a first transistor 201, a second transistor 202, and a capacitor 203. Each of the first and second transistors 201, 202 is a P-type thin film transistor (TFT), and has a first terminal, a second terminal, and a control terminal.
The organic light emitting diode 1 has a cathode that is adapted to coupling to a first voltage source (VSS). The control terminal of the first transistor 201 is adapted for receiving a scan signal (SCAN). The first terminal of the first transistor 201 is adapted for receiving a data signal (VDATA). The second terminal of the first transistor 201 is coupled electrically to the control terminal of the second transistor 202. The first terminal of the second transistor 202 is adapted for coupling to a second voltage source (VDD). The second terminal of the second transistor 202 is coupled electrically to an anode of the organic light emitting diode 1. The control terminal of the second transistor 202 is coupled electrically to the first terminal of the second transistor 202 via the capacitor 203.
Shown in FIG. 2 are timing sequences of the scan signal (SCAN) and the data signal (VDATA) for the first conventional driving circuit 2. When the scan signal (SCAN) is at a logic low level, the first transistor 201 is turned on, such that the data signal (VDATA) is transferred to the control terminal of the second transistor 202, and such that the capacitor 203 stores energy from the data signal (VDATA). On the other hand, when the scan signal (SCAN) is at a logic high level, the first transistor 201 is turned off. The second transistor 202 generates the driving current (IDRIVE) with reference to the energy stored in the capacitor 203 according to the following formula:
                              I          DRIVE                =                ⁢                              1            2                    ⁢                      μ            p                    ⁢                      C            ox                    ⁢                                    W              202                                      L              202                                ⁢                                    (                                                V                                      C                    ,                    203                                                  -                                                                        V                                          TH                      ,                      202                                                                                                    )                        2                                                  =                ⁢                              1            2                    ⁢                      μ            p                    ⁢                      C            ox                    ⁢                                    W              202                                      L              202                                ⁢                                    (                                                V                  DD                                -                                  V                  DATA                                -                                                                        V                                          TH                      ,                      202                                                                                                    )                        2                              where (W202) and (L202) are width and length of the second transistor 202, (VC,203) is the voltage across the capacitor 203, and (VTH,202) is a threshold voltage for the second transistor 202.
Since the threshold voltages of the second transistors 202 for individual pixel circuits are not identical, the driving currents (IDRIVE) generated by the pixel circuits differ from each other even with the same data signal (VDATA), thereby resulting in luminance variations among the light emitted by the organic light emitting diodes 1. In addition, since an electrical wire connected to the second voltage source (VDD) has a non-zero impedance per unit length, and since the electrical wire is normally coupled electrically in sequence to the pixel circuits, the voltage drop (in particular, “IR” drop) between adjacent ones of the pixel circuits makes the actual voltages received by the pixel circuits from the second voltage source (VDD) differ from each other, thereby also resulting in different driving currents (IDRIVE) among the pixel circuits. Consequently, this also attributes to the difference in luminance among the organic light emitting diodes 1.
Shown in FIG. 3 is another pixel circuit that incorporates a second conventional driving circuit 2′, and that also includes an organic light emitting diode 1. The second conventional driving circuit 2′ includes a first transistor 211, a second transistor 212, and a capacitor 213. Each of the first and second transistors 211, 212 is an N-type thin film transistor (TFT), and has a first terminal, a second terminal, and a control terminal.
The organic light emitting diode 1 has a cathode that is adapted to coupling to a first voltage source (VSS). The control terminal of the first transistor 211 is adapted for receiving a scan signal (SCAN). The first terminal of the first transistor 211 is adapted for receiving a data signal (VDATA). The second terminal of the first transistor 211 is coupled electrically to the control terminal of the second transistor 212. The first terminal of the second transistor 212 is adapted for coupling to a second voltage source (VDD). The second terminal of the second transistor 212 is coupled electrically to the second terminal of the first transistor 211 via the capacitor 213, and is coupled electrically to an anode of the organic light emitting diode 1.
Shown in FIG. 4 are timing sequences of the scan signal (SCAN) and the data signal (VDATA) for the second conventional driving circuit 2′. When the scan signal (SCAN) is at a logic high level, the first transistor 211 is turned on, such that the data signal (VDATA) is transferred to the control terminal of the second transistor 212, and such that the capacitor 213 stores energy from the data signal (VDATA). On the other hand, when the scan signal (SCAN) is at a logic low level, the first transistor 211 is turned off. The second transistor 212 generates the driving current (IDRIVE) with reference to the energy stored in the capacitor 213 according to the following formula:
                              I          DRIVE                =                ⁢                              1            2                    ⁢                      μ            n                    ⁢                      C            ox                    ⁢                                    W              212                                      L              212                                ⁢                                    (                                                V                                      C                    ,                    213                                                  -                                  V                                      TH                    ,                    212                                                              )                        2                                                  =                ⁢                              1            2                    ⁢                      μ            n                    ⁢                      C            ox                    ⁢                                    W              212                                      L              212                                ⁢                                    (                                                V                  DATA                                -                                  V                  OLED                                -                                  V                                      TH                    ,                    212                                                              )                        2                              where (W212) and (L212) are width and length of the second transistor 212, (VC,213) is the voltage across the capacitor 213, and (VTH,212) is a threshold voltage for the second transistor 212.
Since the threshold voltages of the second transistors 212 for individual pixel circuits are not identical, the driving currents (IDRIVE) generated by the pixel circuits differ from each other even with the same data signal (VDATA), thereby resulting in luminance variations among the light emitted by the organic light emitting diodes 1. In addition, as the organic light emitting diode 1 of each pixel circuit ages with time, voltage drop across the organic light emitting diode 1 would also increase, thereby resulting in a reduction in the driving current (IDRIVE).
As shown in FIG. 5, yet another pixel circuit incorporating a third conventional driving circuit 2″ has been proposed in Taiwanese Patent No. 228696 in order to diminish the effect of the threshold voltage differences and the variations in actual voltage received from the voltage source on luminance variations of the organic light emitting diodes of the pixel circuits. The third conventional driving circuit 2″ includes a first transistor 221, a second transistor 222, a third transistor 223, a fourth transistor 224, a fifth transistor 225, and a capacitor 226. Each of the first to fifth transistors 221˜225 is a P-type TFT, and has a first terminal, a second terminal, and a control terminal. The pixel circuit further includes an organic light emitting diode 1 having a cathode that is adapted for coupling to a first voltage source (VSS).
The control terminal of the first transistor 221 is adapted for receiving a current scan signal (SCANk). The first terminal of the first transistor 221 is adapted for receiving a data signal (VDATA). The second terminal of the first transistor 221 is connected electrically to the first terminal of the second transistor 222 (this node is hereinafter referred to as node (A)). The control terminal of the second transistor 222 is connected electrically to the second terminal of the second transistor 222, to the first terminal of the third transistor 223, to the control terminal of the fourth transistor 224, and to one end of the capacitor 226 (this node is hereinafter referred to as node (B)). The control terminal of the third transistor 223 is adapted for receiving a previous scan signal (SCANk-1). The second terminal of the third transistor 223 is adapted to be connected to ground. The first terminal of the fourth transistor 224 is connected electrically to the other end of the capacitor 226, and is adapted for coupling to a second voltage source (VDD). The second terminal of the fourth transistor 224 is connected electrically to the first terminal of the fifth transistor 225. The control terminal of the fifth transistor 225 is adapted for receiving a control signal (CTRL). The second terminal of the fifth transistor 225 is connected electrically to an anode of the organic light emitting diode 1.
Shown in FIG. 6 are timing sequences of the current and previous scan signals (SCANk), (SCANk-1), and the control signal (CTRL) for the third conventional driving circuit 2″. When the previous scan signal (SCANk-1) is at a logic low level, the current scan signal (SCANk) is at a logic high level, and the control signal (CTRL) is at a logic high level, the third transistor 223 is turned on, the first transistor 221 is turned off, and the fifth transistor 225 is turned off, such that ground voltage is transferred to the node (B), and the fourth transistor 27 does not generate the driving current (IDRIVE).
When the previous scan signal (SCANk-1) is at a logic high level, the current scan signal (SCANk) is at a logic low level, and the control signal (CTRL) is at a logic high level, the third transistor 223 is turned off, the first transistor 221 is turned on, and the fifth transistor 225 is turned off, such that the data signal (VDATA) is transferred to the node (A). The voltage at the node (B) is pulled up through the second transistor 222 until the voltage at the node (B) is equal to the data signal (VDATA) subtracted by the absolute value of the threshold voltage for the second transistor 222. In this situation, the fourth transistor 224 does not generate the driving current (IDRIVE).
When the previous scan signal (SCANk-1) is at a logic high level, the current scan signal (SCANk) is at a logic high level, and the control signal (CTRL) is at a logic low level, the third transistor 223 is turned off, the first transistor 221 is turned off, and the fifth transistor 225 is turned on. The fourth transistor 224 generates the driving current (IDRIVE) with reference to the voltage across the capacitor 226 according to the following formula:
                              I          DRIVE                =                ⁢                              1            2                    ⁢                      μ            p                    ⁢                      C            ox                    ⁢                                    W              224                                      L              224                                ⁢                                    (                                                V                                      C                    ,                    226                                                  -                                                                        V                                          TH                      ,                      224                                                                                                    )                        2                                                  =                ⁢                              1            2                    ⁢                      μ            p                    ⁢                      C            ox                    ⁢                                    W              224                                      L              224                                ⁢                                    (                                                V                  DD                                -                                  V                  B                                -                                                                        V                                          TH                      ,                      224                                                                                                    )                        2                                                  =                ⁢                              1            2                    ⁢                      μ            p                    ⁢                      C            ox                    ⁢                                    W              224                                      L              224                                ⁢                                    (                                                V                  DD                                -                                  V                  DATA                                +                                                                        V                                          TH                      ,                      222                                                                                        -                                                                        V                                          TH                      ,                      224                                                                                                    )                        2                              where (W224) and (L224) are respectively width and length of the fourth transistor 224, (VC,226) is the voltage across the capacitor 226, (VB) is the voltage at the node (B), (VTH,224) is the threshold voltage for the fourth transistor 224, and (VTH,222) is the threshold voltage for the second transistor 222. Since the second and fourth transistors 222, 224 are very close to each other in location, the threshold voltages thereof can be assumed to be identical. Therefore, the formula can be simplified and rewritten as follows.
      I    DRIVE    =            1      2        ⁢          μ      p        ⁢          C      ox        ⁢                  W        224                    L        224              ⁢                  (                              V            DD                    -                      V            DATA                          )            2      
As can be seen from the formula, the effect on the driving current (IDRIVE) due to the threshold voltage of the fourth transistor 224 for each of the pixel circuits is canceled out by that due to the threshold voltage of the second transistor 222. Furthermore, by making an electrical wire connected to the second voltage source (VDD) connect to the pixel circuits that receive identical scan signals (either the previous scan signal (SCANk-1) or the current scan signal (SCANk)), since these pixel circuits simultaneously receive the data signal (VDATA) when the driving currents (IDRIVE) are not generated, (so that no current passes through the electrical wire), the voltages received from the second voltage source (VDD) by the set of pixel circuits that receive the same scan signals (either the previous scan signal (SCANk-1) or the current scan signal (SCANk)) are identical. Consequently, the effect of different actual voltages received from the second voltage source (VDD) upon the voltages across the capacitors 226 of the pixel circuits can be eliminated such that the driving currents (IDRIVE) generated by the pixel circuits are identical to each other with the same data signal (VDATA), thereby resulting in identical luminance among the light emitted by the organic light emitting diodes 1.
However, although the third conventional driving circuit 2″ is capable of reducing the effects of the threshold voltage differences and the variations in the actual voltage received from the voltage source on the luminance variations of the organic light emitting diodes 1, three more transistors are required in the third conventional driving circuit 2″ as compared to the first and second conventional driving circuits 2, 2′ (as shown in FIG. 1 and FIG. 3, respectively), thereby reducing an aperture ratio (i.e., a ratio of coverage area of effective illuminating display region) of the OLED display utilizing the third conventional driving circuit 2″. Consequently, utilization efficiency of the light is diminished.